The degree of integration of semiconductor integrated circuits has increased year by year in concert with development in the miniaturization of transistors. As the degree of integration has increased, the logical LSI functions realizable on one chip have increased dramatically.
As a result, 32 and 64 bit microprocessors have been developed and installed in industrial and consumer apparatuses, and an extremely high degree of control has been conducted. However, the method in which predetermined control is conducted by programming general purpose chips such as microprocessors in accordance with the respective purpose has the drawback that, in general, processing speed is reduced.
Specialized LSI chips which are developed so as to conform to specific applications and which are incorporated into the appropriate systems, that is to say, the so-called custom LSIs, have thus increased in importance; however, it is currently the case that an enormous amount of time and cost is associated with the development of specialized chips, and such development is incapable of meeting the needs of a rapidly developing world.
Furthermore, in semiconductor manufacturing facilities which produce chips, in order to produce a variety of custom LSIs, it is necessary to store a large number of LSI pattern originals (termed reticles), and to conduct the manufacturing of LSIs by, where necessary, setting these in a stepper (a pattern projection transfer apparatus); this causes problems such as a marked decrease in manufacturing efficiency, in particular in view of the time required for the changing of the reticles.
Accordingly, the development of technology by which a variety of custom LSIs can be produced using, in so far as possible, identical reticles, has been desired.
An example of technology meeting these requirements is the gate array. A gate array is constructed by arranging a plurality of identical circuit blocks, wherein two NMOS and PMOS transistors are formed into a group, on a chip. The necessary logical function is then realized by appropriately connecting these transistors by means of a conductive wiring pattern such as Al or the like. This technology is capable of forming simple circuits, such as AND, NAND, OR, and NOR circuits, comparatively easily; however, if an attempt is made to realize higher functions, a large number of transistors become necessary, and the formation of an extremely complex wiring pattern is required. For example, 38 transistors are required in order to realize a simple 3-input EXCLUSIVE NOR circuit.
For this reason, the gate array technology lacks flexibility when used to construct various logic circuits, and furthermore, it is also inferior to custom LSIs from the point of view of function integration, so that this technology has recently come to be employed only rarely.
However, there is no appropriate technology other than the gate array for special uses in which only a small number of chips are required, so that this technology is still employed in a limited fashion.
However, time is required for the design which is necessary in order to realize the logical functions, so that, needless to say, this causes a delay in technological improvements. Among technologies which permit the simple execution of design, there is also the PLA (Programmable Logic Array), which permits the direct realization of function formulas expressed in Boolean algebra on a chip by means of disconnecting fuses and the like; however, this is limited to a small scale. Furthermore, there are also problems with the high speed operation and reliability of the circuitry.